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||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| 2 - bit bi - directio nal level shifter with automatic sensing & ultra tiny package 2 0 1 5 - 0 7 - 0 0 2 3 pt0 461 - 3 0 7 / 2 8 /1 5 1 pi4uls5v202 features ? v cca can be less than, greater than or equal to v ccb ? 1. 2 v to 5.5 v on a port and 1. 2 v t o 5.5 v on b port ? high?speed with 2 0 mb/s dat a rate for push - pull application ? high?speed with 2 mb/s dat a rate for open - drain application ? no direction - control si gnal needed ? low bit - to - bit skew ? non - preferential power - up sequencing ? esd protection exceeds 8k v hbm per jesd22 - a114 ? integrated 10 k pull - up resistors ? package : u d fn1. 2 x1.6 - 8l and msop - 8l applications ? i 2 c, smbus , mdio ? low voltage asic level translation ? mobile phones, pdas, camera pin configuration u d fn1. 2 x1.6 - 8l description the pi4uls5v202 is a 2 - bit configurable dual supply bidirectional auto sensing translator that does not require a directional control pin. the a and b port s are designed to track two different power supply rails, v cca and v ccb respectively. both the v cca and v ccb supply rails are configurable from 1. 2 v to 5.5 v. this allows voltage logic signals on the v cca side to be translated into lower, higher or equal va lue voltage logic signals on the v ccb side, and vice - versa. the translator has integrated 10 k? pull - up resistors on the i/o lines. the integrated pull - up resistors are used to pull - up the i/o lines to either v cca or v ccb . the pi4uls5v202 is an excellent m atch for open - drain applications such as the i 2 c communication bus . pin description pin no pin name type description 1 v cca power a - port supply voltage.1.2 v cca cca . 3 a2 i/o input/output a. referen ced to v cca 4 gnd gnd ground. 5 en input output enable (active high). pull en low to place all outputs in 3 - state mode. 6 b2 i/o input/output b. referenced to v ccb 7 b1 i/o input/output b. referenced to v ccb 8 v ccb power b - port supply voltage. 1.2 v ccb cca a1 a2 gnd v ccb b1 b2 en vcca a1 a2 gnd vccb b1 b2 en msop - 8l
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| 2 0 1 5 - 0 7 - 0 0 2 3 pt0 461 - 3 0 7 / 2 8 /1 5 2 pi4uls5v202 2 - bit bi - directional level s hifter with automatic sensing & ultra tiny package block diagram figure 1: block diagram maximum ratings storage temperature ................................ ................................ ................... - 6 5 o c to +1 50 o c dc supply voltage port b ................................ ................................ .............. - 0. 3 v to + 5.5 v dc supply voltage port a ................................ ................................ .............. - 0. 3 v to +5.5 v vi(a) referenced dc input / output voltage ................................ .............. - 0 . 3 v to + 5.5 v v i(b) referenced dc input / output voltage ................................ ............... - 0.3 v to +5.5 v enable control pin dc input voltage ................................ ....... - 0.3 v to +5.5 v short circuit duration ( i/o to gnd) ................................ ...................... 4 0 ma recommended operation conditions symbol parameter min typ max unit v cca v cca positive dc supply voltage 1.2 - 5 .5 v v cc b v ccb positive dc supply voltage 1.2 - 5.5 v v en enable control pin voltage gnd - 5.5 v v io i/o pin voltage gnd - 5.5 v t a operating temperature range ? 40 - +85 c note: stresses greater than those listed under maximum ratings may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other condi - tions above th ose indicated in the operational sec - tions of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect reliability.
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| 2 0 1 5 - 0 7 - 0 0 2 3 pt0 461 - 3 0 7 / 2 8 /1 5 3 pi4uls5v202 2 - bit bi - directional level s hifter with automatic sensing & ultra tiny package dc electrical characteristics unless otherwise specified, - 40ct a 8 5c , 1. 2 v vcc 5.5v symbol parameter test conditions min typ max unit v ihb b port input high voltage - v ccb C ilb b port input low voltage - - - 0.15 v v iha a port input high voltage - v cca C ila a port input low voltage - - - 0.15 v v ih control pin input high voltage - v cca C il control pin input low voltage - - - 0.15 v v ohb b port output high voltage b port source current = - 20 a 2/3 * v ccb - - v v olb b port output low voltage b port sink current = 1 ma - - 1/3 * v ccb v v oha a port output high voltage a port source current = - 20 a 2/3 * v cca - - v v ola a port output low voltage a port sink current = 1 ma - - 1/3 * v cca v i qvcb v ccb supply current b port and a port unconnected, ven = v cca - 0.5 5 .0 a i qvca v cca supply current b port and a port unconnected, ven = v cca - 0.3 5.0 a i ts ? ccb b tri?state output mode ts ? cca a t ri?state output mode supply oz i/o t r i ? pu pull ? k? note : all units are production tested at t a = +25 c. limits over the operating temperature range are guaranteed by design. typical values are for v ccb = +2.8 v, v cca = +1.8 v and t a = +25c. ac electrical characteristics t iming characteristics ? rail ? to ? rail driving configuration (i/o test circuits of figures 2, 3 and 7, c load = 15 pf, driver output impedance 50 , r load = 1 m, unless otherwise specified) symbol parameter test conditions min typ max unit v cca = 1.8v , v ccb = 2.8 v t r b b port rise t ime - - - 15 ns t f b b port fall t ime - - - 15 ns t ra a port ris e t ime - - - 25 ns t f a a port fall t ime - - - 10 ns t phl ? a ? b propagation delay ( driving a ) - - - 15 ns t plh ? a ? b - - - 15 ns t phl ? b ? a propagation delay ( driving b ) - - - 15 ns t plh ? b ? a - - - 15 ns t ppskew part ? ?
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| 2 0 1 5 - 0 7 - 0 0 2 3 pt0 461 - 3 0 7 / 2 8 /1 5 4 pi4uls5v202 2 - bit bi - directional level s hifter with automatic sensing & ultra tiny package continuously. symbol parameter test conditions min typ max unit v cca = 2.8v , v ccb = 1.8 v t r b b port rise t ime - - - 25 ns t f b b port fall t ime - - - 10 ns t ra a port rise t ime - - - 20 ns t fa a po rt fall t ime - - - 15 ns t phl?a?b plh?a?b phl?b?a plh?b?a ppskew part ? ? v cca = 2.5v , v ccb = 3.6 v t rb b p ort rise t ime - - - 15 ns t fb b port fall t ime - - - 10 ns t ra a port rise t ime - - - 15 ns t fa a port fall t ime - - - 10 ns t phl?a?b plh?a?b phl?b?a plh?b?a ppskew part ? ? v cca = 3.6v , v ccb = 2.5 v t rb b port rise t ime - - - 15 ns t fb b port fall t ime - - - 10 ns t ra a port rise t ime - - - 15 ns t fa a port fall t ime - - - 15 ns t phl?a?b plh?a?b phl?b?a p lh?b?a ppskew part ? ?
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| 2 0 1 5 - 0 7 - 0 0 2 3 pt0 461 - 3 0 7 / 2 8 /1 5 5 pi4uls5v202 2 - bit bi - directional level s hifter with automatic sensing & ultra tiny package continuously. symbol parameter test conditions min typ max unit v cca = 1.5v , v ccb = 5.5 v t r b b port rise t ime - - - 15 ns t fb b port fall t ime - - - 20 ns t ra a port rise t ime - - - 30 ns t fa a port fall t ime - - - 10 ns t phl?a?b plh?a?b phl?b?a plh?b?a ppskew part ? ? v cca = 5.5 , v ccb = 1.5 v t rb b port rise t ime - - - 30 ns t fb b port fall t ime - - - 2 0 ns t ra a port rise t ime - - - 15 ns t fa a port fall t ime - - - 4 0 ns t phl?a?b plh?a?b phl?b?a plh?b?a ppskew part ? ? v cca = 1. 2 v , v ccb = 5.5 v t rb b port rise t ime - - - 15 ns t fb b port fall t ime - - - 30 ns t ra a port rise t ime - - - 30 ns t fa a port fall t ime - - - 15 ns t phl?a?b plh?a?b phl?b?a plh?b?a ppskew part ? ? v cca = 5.5 v , v ccb = 1.2 v t rb b port rise t ime - - - 30 ns t fb b port fall t ime - - - 15 ns t ra a port rise t ime - - - 15 ns t fa a port fall t ime - - - 30 ns t phl?a?b 15 ns t plh?a?b 15 ns t phl?b?a 20 ns t plh?b?a 15 ns t ppskew part ? ? 5 ns mdr maximum data rate - 20 - - mbps
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| 2 0 1 5 - 0 7 - 0 0 2 3 pt0 461 - 3 0 7 / 2 8 /1 5 6 pi4uls5v202 2 - bit bi - directional level s hifter with automatic sensing & ultra tiny package t iming characteristics C open drain driving configuration (i/o test circuits of figures 4 , 5 and 7, c load = 15 pf, driver output impedance 50 , r load = 1 m, unless otherwi se specified) symbol parameter test conditions min typ max unit 1. 2 v cca v ccb 5.5v r b b port rise time - - - 4 5 0 ns t fb b port fall time - - - 3 0 ns t ra a port rise time - - - 4 5 0 ns t f a a port fall time - - - 3 0 ns t phl? a ? b propagation dela y ( driving a ) - - - 3 00 ns t plh? a ? b - - - 3 00 ns t phl? b ? a propagation delay ( driving b ) - - - 3 00 ns t plh? b ? a - - - 3 00 ns t ppskew part?to?part skew t est circuits
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| 2 0 1 5 - 0 7 - 0 0 2 3 pt0 461 - 3 0 7 / 2 8 /1 5 7 pi4uls5v202 2 - bit bi - directional level s hifter with automatic sensing & ultra tiny package
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| 2 0 1 5 - 0 7 - 0 0 2 3 pt0 461 - 3 0 7 / 2 8 /1 5 8 pi4uls5v202 2 - bit bi - directional level s hifter with automatic sensing & ultra tiny package functional description th e pi4uls5v202 is a 2 - bit configurable dual supply bidirectional auto sensing translator that does not require a directional control pin. the a and b ports are designed to track two different power supply rails, v cca and v ccb respectively. both the v cca and v ccb supply rails are configurable from 1. 2 v to 5.5 v. this allows voltage logic signals on the v cca side to be translated into lower, higher or equal value voltage logic signals on the v ccb side, and vice - versa. the translator has integrated 10 k? pull? up resistors on the i/o lines. the integrated pull - up resistors are used to pull?up the i/o lines to either v cca or v ccb . the pi4uls5v202 is an excellent match for open - drain applications such as the i 2 c communication bus . a pplication information lev el translator architecture the pi4uls5v202 auto sense translator provides bi directional voltage level shifting to transfer data in multiple supply voltage systems. this device has two supply voltages, v cca and v ccb , which set the logic levels on the in put and output sides of the translator. when used to transfer data from a port to b port , input signals referenced to the v cca supply are translated to output signals with a logic level matched to v ccb . in a similar manner, translation shifts input signals with a logic level compatible to v ccb to an output signal matched to v cca . the pi4uls5v202 consists of two bi directional channels that independently determine the direction of the data flow without requiring a directional pin. the one?shot circuits are u sed to detect the rising or falling input signals. in addition, the one shots decrease the rise and fall time of the output signal for high - to - low and low - to - high transitions. each input/output ch annel has an internal 10 k pull. the magnitude of the pull - up resistors can be reduced by connecting external resistors in parallel to the internal 10 k resistors. input driver requirements the rise (t r ) and fall (t f ) timing parameters of the open drain outputs depend on the magnitude of the pull?up res istors. in - addition, the propagation times (t pd ), skew (t pskew ) and maximum data rate depend on the impedance of the device that is connected to the translator. the timing parameters listed in the data sheet assume that the output impedance of the driver s connected to the translator is less than 50 k? . enable input (en) the pi4uls5v202 has an enable pin (en) that provides tri?state operation at the i/o pins. driving the enable pin to a low logic level minimizes the power consumption of the device and dri ves the i/o v ccb and i/o v cca pins to a high impedance state. normal translation operation occurs when the en pin is equal to a logic high signal. the en pin is referenced to the v cca supply and has o vervoltage t olerant protection. power supply guideline s during normal operation, supply volt age v cca can be greater than, less than or equal to v ccb . the sequencing of the power supplies will not damage the device during the power up operation. for optimal performance, 0.01 f to 0.1 f decoupling capacitors s hould be used on the v cca and v ccb power supply pins. ceramic capacitors are a good design choice to filter and bypass any noise signals on the voltage lines to the ground plane of the pcb. the noise immunity will be maximized by placing the capacitors as close as possible to the supply and ground pins, along with minimizing the pcb connection traces.
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| 2 0 1 5 - 0 7 - 0 0 2 3 pt0 461 - 3 0 7 / 2 8 /1 5 9 pi4uls5v202 2 - bit bi - directional level s hifter with automatic sensing & ultra tiny package mechanical information u d fn 1.2 x1.6 - 8l
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| 2 0 1 5 - 0 7 - 0 0 2 3 pt0 461 - 3 0 7 / 2 8 /1 5 10 pi4uls5v202 2 - bit bi - directional level s hifter with automatic sensing & ultra tiny package recommended land pattern for dfn1.6*1.2 - 8 l note: all linear dimensions are in millimeters
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| 2 0 1 5 - 0 7 - 0 0 2 3 pt0 461 - 3 0 7 / 2 8 /1 5 11 pi4uls5v202 2 - bit bi - directional level s hifter with automatic sensing & ultra tiny package msop - 8 ordering information part no. package code package pi4uls5v202 xv e xv lead free and green 8 - pin u d fn1.2x1.6 pi4uls5v202 ue u lead free and green 8 - pin msop note: ? e = pb - free ? adding x suffix = tape /r eel pericom semiconductor corporation ? 1 - 800 - 435 - 2336 ? www.pericom.com pericom reserves the right to make changes to its products or specifications at any time, without notice, in order to improve design or performance and to supply the best possible product. pericom does not assume any responsibility for use of any circuitry described other than the circuitry embodied in pericom pr oduct. the company makes no representations that circuitry described herein is free from patent infringement or other rights, of p ericom .

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